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1 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 features ? precision supply-voltage monitor - 4.63v (pt7a7511, 7521, 7531) - 4.38v (pt7a7512, 7522, 7532) - 3.08v (pt7a7513, 7523, 7533) - 2.93v (pt7a7514, 7524, 7534) - 2.63v (PT7A7515, 7525, 7535) ? 200ms reset pulse width ? debounced ttl/cmos-compatible manual- reset input ? independent watchdog timer 1.6sec time-out (not available for pt7a7531 - 7535) ? reset output signal: - active-low only (pt7a7511 - 7515) - active-high only (pt7a7521 - 7525) - active-high and active-low (pt7a7531 - 7535) ? voltage monitor for power-fail or low battery warning ? guaranteed reset/reset valid at v cc = 1.2v discription the pt7a751x/752x/753x family microprocessor ( p) supervisory circuits are targeted to improve reliability and accuracy of power-supply circuitry in p?s systems. these devices reduce the complexity and number of components required to monitor power-supply and battery functions. the main functions are: 1. asserting reset output during power-up, power-down and brownout conditions for p system; 2. detecting power failure or low-battery conditions with a 1.25v threshold detector; 3. watchdog functions (not for pt7a753x). applications ? power-supply circuitry in p systems
2 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 ordering information note: lead free package is available by add e after each part no. for example: pt7a7511pe for pdip-8 lead free. . o n t r a p. o n t r a p . o n t r a p . o n t r a p. o n t r a pe g a k c a pe g a k c a p e g a k c a p e g a k c a pe g a k c a p. o n t r a p. o n t r a p . o n t r a p . o n t r a p. o n t r a pe g a k c a pe g a k c a p e g a k c a p e g a k c a pe g a k c a p. o n t r a p. o n t r a p . o n t r a p . o n t r a p. o n t r a pe g a k c a pe g a k c a p e g a k c a p e g a k c a pe g a k c a p p 1 1 5 7 a 7 t p8 - p i d pw 1 1 5 7 a 7 t p8 - c i o se d 1 1 5 7 a 7 t pm r o f e i d p 1 2 5 7 a 7 t p8 - p i d pw 1 2 5 7 a 7 t p8 - c i o se d 1 2 5 7 a 7 t pm r o f e i d p 1 3 5 7 a 7 t p8 - p i d pw 1 3 5 7 a 7 t p8 - c i o se d 1 3 5 7 a 7 t pm r o f e i d p 2 1 5 7 a 7 t p8 - p i d pw 2 1 5 7 a 7 t p8 - c i o se d 2 1 5 7 a 7 t pm r o f e i d p 2 2 5 7 a 7 t p8 - p i d pw 2 2 5 7 a 7 t p8 - c i o se d 2 2 5 7 a 7 t pm r o f e i d p 2 3 5 7 a 7 t p8 - p i d pw 2 3 5 7 a 7 t p8 - c i o se d 2 3 5 7 a 7 t pm r o f e i d p 3 1 5 7 a 7 t p8 - p i d pw 3 1 5 7 a 7 t p8 - c i o se d 3 1 5 7 a 7 t pm r o f e i d p 3 2 5 7 a 7 t p8 - p i d pw 3 2 5 7 a 7 t p8 - c i o se d 3 2 5 7 a 7 t pm r o f e i d p 3 3 5 7 a 7 t p8 - p i d pw 3 3 5 7 a 7 t p8 - c i o se d 3 3 5 7 a 7 t pm r o f e i d p 4 1 5 7 a 7 t p8 - p i d pw 4 1 5 7 a 7 t p8 - c i o se d 4 1 5 7 a 7 t pm r o f e i d p 4 2 5 7 a 7 t p8 - p i d pw 4 2 5 7 a 7 t p8 - c i o se d 4 2 5 7 a 7 t pm r o f e i d p 4 3 5 7 a 7 t p8 - p i d pw 4 3 5 7 a 7 t p8 - c i o se d 4 3 5 7 a 7 t pm r o f e i d p 5 1 5 7 a 7 t p8 - p i d pw 5 1 5 7 a 7 t p8 - c i o se d 5 1 5 7 a 7 t pm r o f e i d p 5 2 5 7 a 7 t p8 - p i d pw 5 2 5 7 a 7 t p8 - c i o se d 5 2 5 7 a 7 t pm r o f e i d p 5 3 5 7 a 7 t p8 - p i d pw 5 3 5 7 a 7 t p8 - c i o se d 5 3 5 7 a 7 t pm r o f e i d function comparison function table of pt7a75xx family pt7a7511 4.63v low 200 1.6 1.25v detector yes pt7a7521 4.63v high 200 1.6 1.25v detector yes pt7a7531 4.63v low, high 200 unavailable 1.25v detector yes pt7a7512 4.38v low 200 1.6 1.25v detector yes pt7a7522 4.38v high 200 1.6 1.25v detector yes pt7a7532 4.38v low, high 200 unavailable 1.25v detector yes pt7a7513 3.08v low 200 1.6 1.25v detector yes pt7a7523 3.08v high 200 1.6 1.25v detector yes pt7a7533 3.08v low, high 200 unavailable 1.25v detector yes pt7a7514 2.93v low 200 1.6 1.25v detector yes pt7a7524 2.93v high 200 1.6 1.25v detector yes pt7a7534 2.93v low, high 200 unavailable 1.25v detector yes PT7A7515 2.63v low 200 1.6 1.25v detector yes pt7a7525 2.63v high 200 1.6 1.25v detector yes pt7a7535 2.63v low, high 200 unavailable 1.25v detector yes nom. w atch dog time (sec), t wd powe r fail comp. ma n u al re s e t input part no. re se t th r e s h o l d reset active low or high nom. re set time (ms), t rs
3 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 reset generator mr vcc pfi pfo reset 1.25v v rst vcc 250ua reset block diagram of pt7a7531-7535 block diagram block diagram of pt7a7511-7515/7521-7525 v cc 250ua v rst 1.25v watchdog transition detector watchdog timer wdi wdo timebase for reset & watchdog reset generator mr vcc pfi reset (reset) pfo
4 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 pin information pin configuration pin description e m a n n i pe m a n n i p e m a n n i p e m a n n i pe m a n n i pe p y te p y t e p y t e p y te p y tn o i t p i r c s e dn o i t p i r c s e d n o i t p i r c s e d n o i t p i r c s e dn o i t p i r c s e d r mi : t e s e r - l a u n a m: t e s e r - l a u n a m : t e s e r - l a u n a m : t e s e r - l a u n a m: t e s e r - l a u n a m 0 5 2 l a n r e t n i n a s a h t i . w o l e v i t c a , v 8 . 0 w o l e b d e l l u p n e h w e s l u p t e s e r a s r e g g i r t a a h t i w d n u o r g o t d e t r o h s s a l l e w s a e n i l c i g o l s o m c r o l t t a m o r f n e v i r d e b d n a t n e r r u c p u - l l u p . h c t i w s c c vr e w o p y l p p u s r e w o py l p p u s r e w o p y l p p u s r e w o p y l p p u s r e w o py l p p u s r e w o p d n gd n u o r g e c n e r e f e r d n u o r ge c n e r e f e r d n u o r g e c n e r e f e r d n u o r g e c n e r e f e r d n u o r ge c n e r e f e r d n u o r gs l a n g i s l l a r o f i f pi u p n i r o t i n o m e g a t l o v l i a f - r e w o pu p n i r o t i n o m e g a t l o v l i a f - r e w o p u p n i r o t i n o m e g a t l o v l i a f - r e w o p u p n i r o t i n o m e g a t l o v l i a f - r e w o pu p n i r o t i n o m e g a t l o v l i a f - r e w o p o t i f p t c e n n o c . w o l s e o g o f p , v 5 2 . 1 n a h t s s e l s i i f p n e h w : t . d e s u t o n n e h w c c v r o d n g o f po : t u p t u o l i a f - r e w o p: t u p t u o l i a f - r e w o p : t u p t u o l i a f - r e w o p : t u p t u o l i a f - r e w o p: t u p t u o l i a f - r e w o p s y a t s o f p e s i w r e h t o ; v 5 2 . 1 n a h t s s e l s i i f p n e h w t n e r r u c s k n i s d n a w o l s t e g t i . h g i h i d wi u p n i g o d h c t a wu p n i g o d h c t a w u p n i g o d h c t a w u p n i g o d h c t a wu p n i g o d h c t a w d n a t u o s n u r r e m i t g o d h c t a w l a n r e t n i e h t , c e s 6 . 1 r o f w o l r o h g i h s n i a m e r i d w f i : t s e l b a s i d r e f f u b e t a t s - e e r h t e c n a d e p m i - h g i h a o t i d w g n i t c e n n o c r o i d w g n i t a o l f . w o l s e o g o d w - e e r h t s i i d w . d e t r e s s a s i t e s e r r e v e n e h w s r a e l c r e m i t g o d h c t a w l a n r e t n i e h t . e r u t a e f g o d h c t a w e h t . e g d e g n i l l a f r o g n i s i r a s e e s i d w r o , d e t a t s c nt c e n n o c o n t e s e ro : s e s l u p t u p t u o t e s e r: s e s l u p t u p t u o t e s e r : s e s l u p t u p t u o t e s e r : s e s l u p t u p t u o t e s e r: s e s l u p t u p t u o t e s e r t e s e r e h t w o l e b s i c c v r e v e n e h w w o l s y a t s d n a , d e r e g g i r t n e h w s m 0 0 2 r o f w o l w o l m o r f s e o g r m r o d l o h s e r h t t e s e r e h t e v o b a s e s i r c c v r e t f a s m 0 0 2 r o f w o l s n i a m e r t i . d l o h s e r h t . r m o t d e t c e n n o c s i o d w s s e l n u t e s e r r e g g i r t t o n l l i w t u o e m i t g o d h c t a w a . h g i h o t o d wo t u p t u o g o d h c t a wt u p t u o g o d h c t a w t u p t u o g o d h c t a w t u p t u o g o d h c t a wt u p t u o g o d h c t a w s e o d d n a t n u o c c e s 6 . 1 s t i s e h s i n i f r e m i t g o d h c t a w l a n r e t n i e h t n e h w w o l s l l u p : . s n o i t i d n o c e n i l - w o l g n i r u d w o l s e o g o s l a o d w . d e r a e l c s i g o d h c t a w e h t l i t n u n i a g a h g i h o g t o n s e o d o d w , t e s e r e k i l n u , r e v e w o h ; w o l s y a t s o d w , d l o h s e r h t t e s e r e h t w o l e b s i c c v r e v e n e h w h g i h s e o g o d w , d l o h s e r h t t e s e r e h t e v o b a s e s i r c c v s a n o o s s a . h t d i w e s l u p m u m i n i m e v a h t o n . y a l e d o n h t i w t e s e ro e s e r f o e s r e v n i e h te s e r f o e s r e v n i e h t e s e r f o e s r e v n i e h t e s e r f o e s r e v n i e h te s e r f o e s r e v n i e h t. w o l s i t e s e r , h g i h s i t e s e r r e v e n e h w . h g i h e v i t c a : t top view 1 2 3 4 8 7 6 5 mr v cc gnd pfi wdo reset wdi pfo pt7a7511p-7515p pt7a7511w-7515w 8-pin pdip/8-pin soic 1 2 3 4 8 7 6 5 mr v cc gnd pfi wdo reset wdi pfo pt7a7521p-7525p pt7a7521w-7525w 8-pin pdip/8-pin soic 1 2 3 4 8 7 6 5 mr v cc gnd pfi reset reset nc pfo pt7a7531p-7535p pt7a7531w-7535w 8-pin pdip/8-pin soic
5 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 pad identification
pt7a7511, pt7a7513, pt7a7514, PT7A7515, 1)wafer size: 6 inch 2)wafer thickness: 675um 3)chip size: 810um*1060um (include scribe line width 100um*100um) 4)pad location: refer above diagram and table. pad size75um*75um 5)pad discription refer to pin discription note: /p 4zncpm -pdbujpo 9 :
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7dd
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pt7a7512
1)wafer size: 6 inch 2)wafer thickness: 350um 3)chip size: 1190um*1210um (include scribe line width 150um*90um) 4)pad location: refer above diagram and table. pad size85um*85um 5)pad discription refer to pin discription note: /p 4zncpm -pdbujpo 9 :
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6 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 pt7a7521, pt7a7523, pt7a7524, pt7a7525
1)wafer size: 6 inch 2)wafer thickness: 675um 3)chip size: 810um*1060um (include scribe line width 100um*100um) 4)pad location: refer above diagram and table. pad size75um*75um 5)pad discription refer to pin discription note: /p 4zncpm -pdbujpo 9 :
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pt7a7522
1)wafer size: 6 inch 2)wafer thickness: 350um 3)chip size: 1190um*1210um (include scribe line width 150um*90um) 4)pad location: refer above diagram and table. pad size85um*85um 5)pad discription refer to pin discription note: /p 4zncpm -pdbujpo 9 :
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7 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 pt7a7531, pt7a7534
1)wafer size: 6 inch 2)wafer thickness: 675um 3)chip size: 810um*1060um (include scribe line width 100um*100um) 4)pad location: refer above diagram and table. pad size75um*75um 5)pad discription refer to pin discription note: /p 4zncpm -pdbujpo 9 :
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pt7a7532, pt7a7533, pt7a7535 1)wafer size: 6 inch 2)wafer thickness: 350um 3)chip size: 1190um*1210um (include scribe line width 150um*90um) 4)pad location: refer above diagram and table. pad size85um*85um 5)pad discription refer to pin discription note: /p 4zncpm -pdbujpo 9 :
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8 data sh ee t pt7a75 1 1-7515/7521-7525/7531-753 5 p supervisor circuits | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p t 0 082l ( 0 3 /06 ) v er: 4 f un c t i ona l d e s cri pt i o n the p t 7 5xx f amil y ca n a ss e r t r e s et o ut p ut du r ing po w e r-u p , power-down and brownout conditions for p system, detect power failure or low-battery conditions with a 1.25v threshold detector and have watchdog functions. refer to function t able o f p t 7a 7 5 xx f amily for t h ei r i n divid u al f eatu r e s . the typica l application see figure 4 . reset output the supervisory circuits can assert reset for a microprocesso r during po w er-up, po w er-do w n and bro w nout to prevent cod e execution errors . on power-up, once v c c reaches about 1.2 v , rese t is a guaranteed logic low of 0.4 v or less. as v c c rises, rese t stay s lo w . when v c c rises above the reset threshold, an internal time r relea s e s re s et after about 200m s . re s et pul s e s lo w w heneve r v c c drops below the reset threshold (brownout condition). i f brownout occurs in the middle of a previously initiated rese t pu l s e , t h e pu l s e c on ti nu e s for at lea s t a no t h e r 140 m s. on power-down, once v c c falls below the reset threshold, rese t stays low and is guaranteed to be 0.4v or less until vcc drop s below 1 v . the pt7a752x and pt7a753x active-high reset output is simply the complement of the reset output, and is guarantee d to be valid with v c c down to 1.2 v . some ps, such as intel s 80c51, require an active-high reset pulse. w atc hd og t ime r the watchdog circuit monitors the p activit y . if the p doe s not toggle the watchdog input (wdi) within 1.6sec and wdi is not in high impedance, wdo goes lo w . as long as rese t is a ss e r ted o r the w di in p ut i s in hi g h impeda n ce , the w atchd og timer will stay cleared and will not count. as soon as reset i s r elea s ed and w di i s dr i v en h igh or l o w , the time r w ill s ta rt c oun ti ng. pu l s e s a s shor t a s 50ns ca n b e d etecte d. t ypicall y , wdo will be connected to the non-maskable interrup t i npu t (nmi) of a p . when v c c drops below the reset threshold , wdo will go low whether or not the watchdog timer has timed ou t y et . nor mall y t h i s wou l d t r i gg e r a n nmi i n te rrup t , bu t r e s e t goes low simultaneousl y , and thus overrides the nmi interrupt . if wdi is left unconnected, wdo can be used as a low-line output. since floating wdi disables the internal time r , wd o goe s lo w onl y w hen v c c falls below the reset threshold, thu s functioning as a low-line output . manual reset the manual-reset input (mr) allows reset to be triggered by a pu s h-button sw itch. the sw itch i s effectively debounced b y t h e 140 m s mi n im u m r e s et pu l s e w i d t h. mr i s ttl/ cmos l og i c compatible, so it can be driven by any logic reset output . po w e r -fail c om p arato r the po w er-fail comparator w ill s end out a lo w s ignal onc e detects a voltage lowered than 1.25 v . it can be used for various purposes because its output and non-inverting input are no t internally connected. the inverting input i s internally connecte d t o a 1.25v r e f e r e n ce . t yp ic a l app lica t i on c i r c u i t dc linear regulator vcc supervisory pfi circuit wdi p vcc reset i/o line nmi interrupt in out reset wdo pfo mr p
9 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 recommended operation condition dc electrical characteristics m y sm y s m y s m y sm y sn o i t p i r c s e dn o i t p i r c s e d n o i t p i r c s e d n o i t p i r c s e dn o i t p i r c s e ds n o i t i d n o c t s e ts n o i t i d n o c t s e t s n o i t i d n o c t s e t s n o i t i d n o c t s e ts n o i t i d n o c t s e tn i mn i m n i m n i mn i mp y tp y t p y t p y tp y tx a mx a m x a m x a mx a mt i n ut i n u t i n u t i n ut i n u v c c 2 x 5 7 , 1 x 5 7 r o f e g a t l o v y l p p u s5 . 40 . 55 . 5v 4 x 5 7 , 3 x 5 7 r o f e g a t l o v y l p p u s0 . 33 . 35 . 5v , 5 x 5 7 r o f e g a t l o v y l p p u s7 . 20 . 35 . 5v v 1 h i e g a t l o v h g i h t u p n i r m v c c v 0 . 4 >0 . 24 . 2v v c c v 0 . 4v 7 . 0 c c v v 2 h i e g a t l o v h g i h t u p n i i d wv 7 . 0 c c v v 1 l i e g a t l o v w o l t u p n i r m v c c v 0 . 4 >8 . 0v v c c v 0 . 4v 2 . 0 c c v v 2 l i e g a t l o v w o l t u p n i i d w v 3 . 0 c c v t a e r u t a r e p m e t g n i t a r e p o0 4 -5 8 o c storage temperature ......................................................... -65 o c to +150 o c ambient temperature with power applied ...........................-40 o c to +85 o c supply voltage to ground potential (vcc to gnd) ............... -0.3v to +7.0v dc input voltage (all inputs except vcc and gnd) ......... -0.3v to v cc +0.3v dc output current (all outputs) ..................................................... 20ma power dissipation ......................................................................... 500mw (depend on package) detailed specifications absolute maximum ratings note: stresses greater than those listed under maxi- mum ratings may cause permanent damage to the device. this is a stress rating only and func- tional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. expo- sure to absolute maximum rating conditions for ex- tended periods may affect reliability.
10 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 m y sm y s m y s m y sm y sn o i t p i r c s e dn o i t p i r c s e d n o i t p i r c s e d n o i t p i r c s e dn o i t p i r c s e ds n o i t i d n o c t s e ts n o i t i d n o c t s e t s n o i t i d n o c t s e t s n o i t i d n o c t s e ts n o i t i d n o c t s e tn i mn i m n i m n i mn i mp y tp y t p y t p y tp y tx a mx a m x a m x a mx a mt i n ut i n u t i n u t i n ut i n u i c c t n e r r u c y l p p u s r e w o p l a n o i t a r e p o v 2 x 5 7 / 1 x 5 7 a 7 t c c v 5 = v 4 x 5 7 / 3 x 5 7 a 7 t p c c v 3 . 3 = v 5 x 5 7 a 7 t p c c v 0 . 3 = o n ( d e t c e n n o c - n u i d w t f e l ) d a o l t u p t u o 0 30 0 2 v t s r * e g a t l o v d l o h s e r h t t e s e r t a 5 2 = o c v n r % 5 . 1 - v n r v n r % 5 . 1 + v 1 x 5 7 a 7 t p0 6 5 . 40 3 6 . 49 9 6 . 4 2 x 5 7 a 7 t p4 1 3 . 40 8 3 . 46 4 4 . 4 3 x 5 7 a 7 t p4 3 0 . 30 8 0 . 36 2 1 . 3 4 x 5 7 a 7 t p6 8 8 . 20 3 9 . 24 7 9 . 2 5 x 5 7 a 7 t p0 9 5 . 20 3 6 . 29 6 6 . 2 v h t r * s i s e r e t s y h d l o h s e r h t t e s e rv c c v n e e w t e b s e i r a v n r % 5 -0 7v m v h o e g a t l o v h g i h t u p t u o 0 0 8 = e c r u o s i v 5 . 4 > c c v av c c 5 . 1 - v 0 0 5 = e c r u o s i v 7 . 2 > c c v av 8 . 0 c c 0 5 1 = e c r u o s i v 8 . 1 > c c v av 8 . 0 c c v l o e g a t l o v w o l t u p t u o a m 2 . 3 = k n i s i v 5 . 4 > c c v4 . 0 v a m 2 . 1 = k n i s i v 7 . 2 > c c v3 . 0 0 0 1 = k n i s i v 2 . 1 > c c v a3 . 0 v t f p d l o h s e r h t t u p n i i f p v i f p v 5 . 1 o t v 0 . 1 m o r f s e i r a v t ( a 5 2 = o ) c 3 2 . 15 2 . 17 2 . 1v v i f p v 5 . 1 o t v 0 . 1 m o r f s e i r a v0 2 . 15 2 . 10 3 . 1v i i f p t n e r r u c t u p n i i f p v o t d e t c e n n o c i f p c c 0 0 . 2 a d n g o t d e t c e n n o c i f p0 0 . 2 - i i d w * * t n e r r u c t u p n i i d w e g a r e v a v o t d e t c e n n o c i d w c c 0 30 0 1 a d n g o t d e t c e n n o c i d w0 0 1 -0 3 - i r m t n e r r u c t u p n i r mv , 0 = r m c c v 5 =0 0 6 -0 5 2 -0 0 1 - a dc electrical characteristics dc electrical characteristics * valid for both reset and reset. v rst is voltage threshold when vcc falls from high to low. v rn is nominal reset threshold voltage. ** wdi is internally serviced within the watchdog period if wdi is left unconnected.
11 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 ac electrical characteristics ac electrical characteristics m y sm y s m y s m y sm y sn o i t p i r c s e dn o i t p i r c s e d n o i t p i r c s e d n o i t p i r c s e dn o i t p i r c s e ds n o i t i d n o c t s e ts n o i t i d n o c t s e t s n o i t i d n o c t s e t s n o i t i d n o c t s e ts n o i t i d n o c t s e tn i mn i m n i m n i mn i mp y tp y t p y t p y tp y tx a mx a m x a m x a mx a ms t i n us t i n u s t i n u s t i n us t i n u t s r h t d i w e s l u p t e s e rh g i h o t w o l m o r f r m0 4 10 0 20 8 2s m t d w d o i r e p t u o e m i t g o d h c t a w v o t d e i t r m d n a i d w c c , v c c v > n r % 5 + 0 . 16 . 15 2 . 2s t r m h t d i w e s l u p r m0 5 1s n t d m y a l e d t e s e r o t r mv c c v 0 . 5 =0 5 2s n t p w h t d i w e s l u p i d w0 5s n t wp t wd t wd t wd t rs wdi wdo reset reset 5v 0v 5v 0v 5v 0v 5v 0v externally triggered by mr v rt t rs t rs t mr t md wdo reset mr 5v 0v v rt v cc 5v 0v 5v 0v 5v 0v watchdog timing diagram watchdog timing diagram
12 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 mechanical information p/pe (8-pin pdip) 1 8 .355 .400 9.01 10.16 .240 .280 6.09 7.11 7.62 8.25 .300 .325 .008 .014 0.20 0.35 .430 max 0 o 15 o 10.92 2.54 5.33 .210 max seating plane .014 .022 .115 .150 .356 .558 2.921 3.81 .100 typical .015 min 0.381 x. xx x. xx denotes dimensions in m illim et ers note: 1) controlling dimensions in inches. 2) ref: jedec ms-001 ba
13 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 w/we (8-pin soic) seating plane 1 8 .189 .196 4.80 5.00 .149 .157 3.78 3.99 .016 .026 0.406 0.660 ref .050 bs c 1.27 .013 .020 0.330 0.508 .0040 .0098 0.10 0.25 .053 .068 1.35 1.75 .0099 .0196 0.25 0.50 x 45 o 0-8 o .016 .050 0.40 1.27 .0075 .0098 0.19 0.25 .2284 .2440 5.80 6.20 x.xx x.xx denotes dimensions in m illim et ers note: 1) controlling dimens ions in millimeters . 2) ref: jedec ms-012 aa
14 data sheet pt7a7511-7515/7521-7525/7531-7535 p supervisor circuits ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| pt0082l(03/06) ver:4 pericom technology inc. email: support@pti.com.cn web-site: www.pti.com.cn, www.pti-ic.com china : no. 20 building, 3/f, 481 guiping road, shanghai, 200233, china tel: (86)-21-6485 0576 fax: (86)-21-6485 2181 asia pacific : unit 1517, 15/f, chevalier commercial centre, 8 wang hoi rd, kowloon bay, hongkong tel: (852)-2243 3660 fax: (852)- 2243 3667 u.s.a. : 2380 bering drive, san jose, california 95131, usa tel: (1)-408-435 0800 fax: (1)-408-435 1100 pericom technology incorporation reserves the right to make changes to its products or specifications at any time, without noti ce, in order to improve design or performance and to supply the best possible product. pericom technology does not assume any responsibility fo r use of any circuitry described other than the circuitry embodied in pericom technology product. the company makes no representations that circuitry described herein is free from patent infringement or other rights, of pericom technology incorporation. notes

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